RISC-V Processor Design
An RV32I microprocessor implemented in Verilog HDL.
- Implemented a RISC-V microprocessor based on the RV32I instruction set using Verilog HDL.
- Team project with Aqdas Chaudhary and Shameer Hussain (Microprocessor Systems, NUST, 2023).
Next project: SHA-256 Accelerator for RISC-V