SHA-256 Accelerator for RISC-V
A hardware accelerator for SHA-256 on a RISC-V processor, built from selected functions of the Zknh extension.
- Developed a hardware accelerator for the SHA-256 cryptographic algorithm on a RISC-V processor by integrating selective functions from the Zknh extension suite.
- Team project with M. Aqdas Chaudhary and Omais Waseem (Computer Architecture & Organization, NUST, 2024).
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